alttpr-gwaa-kiwi/alttpr-baserom
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ram.asm initial commit. Replaced all address defines with labels

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Value defines styled without quotes, # moved to load/store/cmp site
Added registers.asm (copied from spannerisms JP disassembly)
Added a bunch of length annotations
Deleted old or trivial commented out code
Deleted: ganonfixes.asm, map.asm, seedtag.asm
Replaced obsolete credits.asm with creditsnew.asm
Moved scratch space at $7F5020-3F to mirrored WRAM (7E1E70-8F)
Moved clock RAM to mirrored WRAM (7E1E90-9F)
dialog.asm: FreeDungeonItemNotice preserves callee-preserved scratch RAM
Toast buffer moved to mirrored WRAM (7E1E0E-0F)
servicerequest.asm: long store to $012E converted to word length store
This commit is contained in:
cassidoxa
2022-11-05 00:50:25 -04:00
parent cafb0908a0
commit 43f753b517
72 changed files with 7706 additions and 7305 deletions
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128
save.asm
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@@ -8,9 +8,9 @@ WriteSaveChecksumAndBackup:
CLC : ADC.l ExtendedFileNameWRAM, X
INX #2
CPX.w #$0FFE : BNE -
STA.b $00
STA.b Scrap00
LDA.w #$5A5A
SEC : SBC.b $00
SEC : SBC.b Scrap00
STA.l InverseChecksumSRAM
PHB
@@ -32,9 +32,9 @@ ValidateSRAM:
CLC : ADC.l ExtendedFileNameSRAM, X
INX #2
CPX.w #$0FFE : BNE -
STA.b $00
STA.b Scrap00
LDA.w #$5A5A
SEC : SBC.b $00
SEC : SBC.b Scrap00
CMP.l InverseChecksumSRAM : BEQ .goodchecksum
LDX.w #$0000 : TXA : - ; Do the same for the backup save
CLC : ADC.l SaveBackupSRAM, X
@@ -44,9 +44,9 @@ ValidateSRAM:
CLC : ADC.l SaveBackupSRAM+$500, X
INX #2
CPX.w #$0FFE : BNE -
STA.b $00
STA.b Scrap00
LDA.w #$5A5A
SEC : SBC.b $00
SEC : SBC.b Scrap00
CMP.l SaveBackupSRAM+$4FE : BEQ +
TDC : STA.l FileValiditySRAM ; Delete save by way of zeroing validity marker
BRA .goodchecksum : +
@@ -132,86 +132,86 @@ RTL
CopyExtendedSaveFileToWRAM:
PHA
SEP #$30
LDA.w $4300 : PHA ; preserve DMA parameters
LDA.w $4301 : PHA ; preserve DMA parameters
LDA.w $4302 : PHA ; preserve DMA parameters
LDA.w $4303 : PHA ; preserve DMA parameters
LDA.w $4304 : PHA ; preserve DMA parameters
LDA.w $4305 : PHA ; preserve DMA parameters
LDA.w $4306 : PHA ; preserve DMA parameters
LDA.w DMAP0 : PHA ; preserve DMA parameters
LDA.w BBAD0 : PHA ; preserve DMA parameters
LDA.w A1T0L : PHA ; preserve DMA parameters
LDA.w A1T0H : PHA ; preserve DMA parameters
LDA.w A1B0 : PHA ; preserve DMA parameters
LDA.w DAS0L : PHA ; preserve DMA parameters
LDA.w DAS0H : PHA ; preserve DMA parameters
;--------------------------------------------------------------------------------
STZ.w $4200 ; Disable NMI, V/H, joypad
STZ.w $420C ; Disable HDMA
LDA.b #$00 : STA.w $4300 ; set DMA transfer direction A -> B, bus A auto increment, single-byte mode
STZ.w NMITIMEN ; Disable NMI, V/H, joypad
STZ.w HDMAEN ; Disable HDMA
LDA.b #$00 : STA.w DMAP0 ; set DMA transfer direction A -> B, bus A auto increment, single-byte mode
LDA.b #$80 : STA.w $4301 ; set bus B source to WRAM register
LDA.b #$80 : STA.w BBAD0 ; set bus B source to WRAM register
LDA.b #$00 : STA.w $2181 ; set WRAM register source address
LDA.b #$60 : STA.w $2182
LDA.b #$7F : STA.w $2183
LDA.b #$00 : STA.w WMADDL ; set WRAM register source address
LDA.b #$60 : STA.w WMADDH
LDA.b #$7F : STA.w WMADDB
STZ.w $4302 ; set bus A destination address to SRAM
LDA.b #$05 : STA.w $4303
LDA.b #$70 : STA.w $4304
STZ.w A1T0L ; set bus A destination address to SRAM
LDA.b #$05 : STA.w A1T0H
LDA.b #$70 : STA.w A1B0
LDA.b #$00 : STA.w $4305 ; set transfer size to 0x1000
LDA.b #$10 : STA.w $4306 ; STZ $4307
LDA.b #$00 : STA.w DAS0L ; set transfer size to 0x1000
LDA.b #$10 : STA.w DAS0H ; STZ DAS0B
LDA.b #$01 : STA.w $420B ; begin DMA transfer
LDA.b #$81 : STA.w $4200 ; Re-enable NMI and joypad
LDA.b #$01 : STA.w MDMAEN ; begin DMA transfer
LDA.b #$81 : STA.w NMITIMEN ; Re-enable NMI and joypad
;--------------------------------------------------------------------------------
PLA : STA.w $4306 ; restore DMA parameters
PLA : STA.w $4305 ; restore DMA parameters
PLA : STA.w $4304 ; restore DMA parameters
PLA : STA.w $4303 ; restore DMA parameters
PLA : STA.w $4302 ; restore DMA parameters
PLA : STA.w $4301 ; restore DMA parameters
PLA : STA.w $4300 ; restore DMA parameters
PLA : STA.w DAS0H ; restore DMA parameters
PLA : STA.w DAS0L ; restore DMA parameters
PLA : STA.w A1B0 ; restore DMA parameters
PLA : STA.w A1T0H ; restore DMA parameters
PLA : STA.w A1T0L ; restore DMA parameters
PLA : STA.w BBAD0 ; restore DMA parameters
PLA : STA.w DMAP0 ; restore DMA parameters
REP #$30
PLA
STA $7EC00D ; what we wrote over
STA.l $7EC00D ; what we wrote over
RTL
;--------------------------------------------------------------------------------
CopyExtendedWRAMSaveFileToSRAM:
PHA
PHB
SEP #$30
LDA #$00 : PHA : PLB
LDA.w $4300 : PHA ; preserve DMA parameters
LDA.w $4301 : PHA ; preserve DMA parameters
LDA.w $4302 : PHA ; preserve DMA parameters
LDA.w $4303 : PHA ; preserve DMA parameters
LDA.w $4304 : PHA ; preserve DMA parameters
LDA.w $4305 : PHA ; preserve DMA parameters
LDA.w $4306 : PHA ; preserve DMA parameters
LDA.b #$00 : PHA : PLB
LDA.w DMAP0 : PHA ; preserve DMA parameters
LDA.w BBAD0 : PHA ; preserve DMA parameters
LDA.w A1T0L : PHA ; preserve DMA parameters
LDA.w A1T0H : PHA ; preserve DMA parameters
LDA.w A1B0 : PHA ; preserve DMA parameters
LDA.w DAS0L : PHA ; preserve DMA parameters
LDA.w DAS0H : PHA ; preserve DMA parameters
;--------------------------------------------------------------------------------
STZ.w $4200 ; Disable NMI, V/H, joypad
STZ.w $420C ; Disable HDMA
LDA.b #$80 : STA.w $4300 ; set DMA transfer direction B -> A, bus A auto increment, single-byte mode
STZ.w NMITIMEN ; Disable NMI, V/H, joypad
STZ.w HDMAEN ; Disable HDMA
LDA.b #$80 : STA.w DMAP0 ; set DMA transfer direction B -> A, bus A auto increment, single-byte mode
STA.w $4301 ; set bus B source to WRAM register
STA.w BBAD0 ; set bus B source to WRAM register
LDA.b #$00 : STA.w $2181 ; set WRAM register source address
LDA.b #$60 : STA.w $2182
LDA.b #$7F : STA.w $2183
LDA.b #$00 : STA.w WMADDL ; set WRAM register source address
LDA.b #$60 : STA.w WMADDH
LDA.b #$7F : STA.w WMADDB
STZ.w $4302 ; set bus A destination address to SRAM
LDA.b #$05 : STA.w $4303
LDA.b #$70 : STA.w $4304
STZ.w A1T0L ; set bus A destination address to SRAM
LDA.b #$05 : STA.w A1T0H
LDA.b #$70 : STA.w A1B0
LDA.b #$10 : STA.w $4305 ; set transfer size to 0xB00
LDA.b #$0B : STA.w $4306 ; STZ $4307
LDA.b #$10 : STA.w DAS0L ; set transfer size to 0xB00
LDA.b #$0B : STA.w DAS0H ; STZ DAS0B
LDA.b #$01 : STA.w $420B ; begin DMA transfer
LDA.b #$81 : STA.w $4200 ; Re-enable NMI and joypad
LDA.b #$01 : STA.w MDMAEN ; begin DMA transfer
LDA.b #$81 : STA.w NMITIMEN; Re-enable NMI and joypad
;--------------------------------------------------------------------------------
PLA : STA.w $4306 ; restore DMA parameters
PLA : STA.w $4305 ; restore DMA parameters
PLA : STA.w $4304 ; restore DMA parameters
PLA : STA.w $4303 ; restore DMA parameters
PLA : STA.w $4302 ; restore DMA parameters
PLA : STA.w $4301 ; restore DMA parameters
PLA : STA.w $4300 ; restore DMA parameters
PLA : STA.w DAS0H ; restore DMA parameters
PLA : STA.w DAS0L ; restore DMA parameters
PLA : STA.w A1B0 ; restore DMA parameters
PLA : STA.w A1T0H ; restore DMA parameters
PLA : STA.w A1T0L ; restore DMA parameters
PLA : STA.w BBAD0 ; restore DMA parameters
PLA : STA.w DMAP0 ; restore DMA parameters
REP #$30
PLB
PLA