diff --git a/events.asm b/events.asm index 1a729eb..e2988ff 100644 --- a/events.asm +++ b/events.asm @@ -89,16 +89,17 @@ OnAga2Defeated: ;-------------------------------------------------------------------------------- OnFileCreation: ; Copy initial SRAM state from ROM to cart SRAM + ; If the inital SRAM table is move these addresses must be changed PHB - LDA.w #$03D7 ; \ - LDX.w #$B000 ; | Copies from beginning of inital sram table up to file name - LDY.w #$0000 ; | (exclusively) - MVN $70, $30 ; / - ; Skip file name and validity value - LDA.w #$010C ; \ - LDX.w #$B3E3 ; | Rando-Specific Assignments & Game Stats block - LDY.w #$03E3 ; | - MVN $70, $30 ; / + LDA.w #$03D7 ; \ + LDX.w #$B000 ; | Copies from beginning of inital sram table up to file name + LDY.w #$0000 ; | (exclusively) + MVN SRAMBank, SRAMTableBank ; / + ; Skip file name and validity value + LDA.w #$010C ; \ + LDX.w #$B3E3 ; | Rando-Specific Assignments & Game Stats block + LDY.w #$03E3 ; | + MVN SRAMBank, SRAMTableBank ; / PLB ; resolve instant post-aga if standard diff --git a/hooks.asm b/hooks.asm index 21c9b24..ede0106 100755 --- a/hooks.asm +++ b/hooks.asm @@ -188,7 +188,7 @@ JSL.l AltBufferTable : NOP #8 ; Delete screen ;-------------------------------------------------------------------------------- org $0CCCCC ;<- 64CCC - Bank0C.asm : 1628 (JSL Intro_ValidateSram) / Bank02.asm : 75 (REP #$30) ; Explanation: In JP 1.0 the code for Intro_ValidateSram was inline in Bank 0C -JML.l Validate_SRAM ;(Return via RTL. Original code JML'd to Intro_LoadSpriteStats which returns with RTL, but we want to skip that) +JML.l ValidateSRAM ;(Return via RTL. Original code JML'd to Intro_LoadSpriteStats which returns with RTL, but we want to skip that) org $0CCD57 ;<- 64D57 - Bank0C.asm : RTL ;Just in case anybody ever removes the previous hook ;-------------------------------------------------------------------------------- @@ -299,12 +299,17 @@ BRA + ;================================================================================ ; Extended SRAM Save file ;-------------------------------------------------------------------------------- -org $0ccf08 ; <- Bank0C.asm : 2036 (LDA.w #$0007 : STA $7EC00D : STA $7EC013) +org $0CCF08 ; <- Bank0C.asm : 2036 (LDA.w #$0007 : STA $7EC00D : STA $7EC013) JSL CopyExtendedSaveFileToWRAM ;-------------------------------------------------------------------------------- org $008998 ; <- Bank00.asm : 1296 (LDX.w #$0000) JSL CopyExtendedWRAMSaveFileToSRAM ;-------------------------------------------------------------------------------- +org $00899C ; <- bank_00.asm : #_00899C (CLC) +JSL WriteSaveChecksumAndBackup +LDA.w #$01F3 : TCS : SEP #$30 : PLB : RTL ; Get the stack and data bank correct +padbyte $FF : pad $0089C2 ; Fill adjacent free rom forward. See bank_00.asm: #_0089C2 +;-------------------------------------------------------------------------------- org $0CD7AB ; <- Bank0C.asm : 3342 (STA $700400, X) JSL.l ClearExtendedSaveFile ;-------------------------------------------------------------------------------- @@ -2807,4 +2812,4 @@ if !FEATURE_NEW_TEXT JSL RenderCharSetColorExtended_init org $0EF285 JSL RenderCharSetColorExtended_close : NOP -endif \ No newline at end of file +endif diff --git a/initsramtable.asm b/initsramtable.asm index a93d0c1..00e80d7 100644 --- a/initsramtable.asm +++ b/initsramtable.asm @@ -15,6 +15,7 @@ fillword $0000 ; Zero out the table fill $500 ; org $30B000 ; PC 0x183000 +InitSRAMTable: InitRoomDataWRAM: org $30B060 ; PC 0x183060 InitATAltarRoom: dw $0000 ; aga curtains diff --git a/save.asm b/save.asm index 1aab65d..5dd1285 100644 --- a/save.asm +++ b/save.asm @@ -1,129 +1,218 @@ ;-------------------------------------------------------------------------------- -Validate_SRAM: - REP #$30 ; vanilla behavior from $0CCD45, includes prize pack reset after save and quit - LDX #$00FE : - - STZ $0D00, X - STZ $0E00, X - STZ $0F00, X - DEX #2 - BPL - +WriteSaveChecksumAndBackup: + LDX.w #$0000 : TXA : - ; Checksum first $04FE bytes + CLC : ADC.l SaveDataWRAM, X + INX #2 + CPX.w #$04FE : BNE - + LDX.w #$0000 : - ; Checksum extended save data + CLC : ADC.l ExtendedFileNameWRAM, X + INX #2 + CPX.w #$0FFE : BNE - + STA.b $00 + LDA.w #$5A5A + SEC : SBC.b $00 + STA.l InverseChecksumSRAM + + PHB + LDA.w #$14FF ; \ + LDX.w #CartridgeSRAM&$FFFF ; | Copies $1500 bytes from beginning of cart SRAM to + LDY.w #SaveBackupSRAM&$FFFF ; | $704000 + MVN SRAMBank, SRAMBank ; / + PLB + +RTL +;-------------------------------------------------------------------------------- +ValidateSRAM: + REP #$30 + LDX.w #$0000 : TXA : - ; Checksum first $04FE bytes + CLC : ADC.l CartridgeSRAM, X + INX #2 + CPX.w #$04FE : BNE - + LDX.w #$0000 : - ; Checksum extended save data + CLC : ADC.l ExtendedFileNameSRAM, X + INX #2 + CPX.w #$0FFE : BNE - + STA.b $00 + LDA.w #$5A5A + SEC : SBC.b $00 + CMP.l InverseChecksumSRAM : BEQ .goodchecksum + LDX.w #$0000 : TXA : - ; Do the same for the backup save + CLC : ADC.l SaveBackupSRAM, X + INX #2 + CPX.w #$04FE : BNE - + LDX.w #$0000 : - + CLC : ADC.l SaveBackupSRAM+$500, X + INX #2 + CPX.w #$0FFE : BNE - + STA.b $00 + LDA.w #$5A5A + SEC : SBC.b $00 + CMP.l SaveBackupSRAM+$4FE : BEQ + + TDC : STA.l FileValiditySRAM ; Delete save by way of zeroing validity marker + BRA .goodchecksum : + + PHB + LDA.w #$14FF ; \ + LDX.w #SaveBackupSRAM&$FFFF ; | Copies $1500 bytes from backup on cart SRAM to + LDY.w #CartridgeSRAM&$FFFF ; | main save location at $700000 + MVN SRAMBank, SRAMBank ; / + PLB + + .goodchecksum + LDX.w #$00FE : - ; includes prize pack reset after save and quit + STZ.w $0D00, X + STZ.w $0E00, X + STZ.w $0F00, X + DEX #2 + BPL - SEP #$30 RTL ;-------------------------------------------------------------------------------- ClearExtendedSaveFile: - STA $700400, X ; what we wrote over - STA $700500, X - STA $700600, X - STA $700700, X - STA $700800, X - STA $700900, X - STA $700A00, X - STA $700B00, X - STA $700C00, X - STA $700D00, X - STA $700E00, X - STA $700F00, X + STA.l $700400, X ; what we wrote over + STA.l $700500, X + STA.l $700600, X + STA.l $700700, X + STA.l $700800, X + STA.l $700900, X + STA.l $700A00, X + STA.l $700B00, X + STA.l $700C00, X + STA.l $700D00, X + STA.l $700E00, X + STA.l $700F00, X + STA.l $701000, X + STA.l $701100, X + STA.l $701200, X + STA.l $701300, X + STA.l $701400, X + ; Clear backup save + STA.l $704000, X + STA.l $704100, X + STA.l $704200, X + STA.l $704300, X + STA.l $704400, X + STA.l $704500, X + STA.l $704600, X + STA.l $704700, X + STA.l $704800, X + STA.l $704900, X + STA.l $704A00, X + STA.l $704B00, X + STA.l $704C00, X + STA.l $704D00, X + STA.l $704E00, X + STA.l $704F00, X + STA.l $705000, X + STA.l $705100, X + STA.l $705200, X + STA.l $705300, X + STA.l $705400, X RTL ;-------------------------------------------------------------------------------- ClearExtendedWRAMSaveFile: - STA $7EF400, X ; what we wrote over - STA $7F6000, X - STA $7F6100, X - STA $7F6200, X - STA $7F6300, X - STA $7F6400, X - STA $7F6500, X - STA $7F6600, X - STA $7F6700, X - STA $7F6800, X - STA $7F6900, X - STA $7F6A00, X - STA $7F6B00, X - STA $7F6C00, X - STA $7F6D00, X - STA $7F6E00, X - STA $7F6F00, X + STA.l $7EF400, X ; what we wrote over + STA.l $7F6000, X + STA.l $7F6100, X + STA.l $7F6200, X + STA.l $7F6300, X + STA.l $7F6400, X + STA.l $7F6500, X + STA.l $7F6600, X + STA.l $7F6700, X + STA.l $7F6800, X + STA.l $7F6900, X + STA.l $7F6A00, X + STA.l $7F6B00, X + STA.l $7F6C00, X + STA.l $7F6D00, X + STA.l $7F6E00, X + STA.l $7F6F00, X RTL ;-------------------------------------------------------------------------------- CopyExtendedSaveFileToWRAM: - PHA - SEP #$30 - LDA $4300 : PHA ; preserve DMA parameters - LDA $4301 : PHA ; preserve DMA parameters - LDA $4302 : PHA ; preserve DMA parameters - LDA $4303 : PHA ; preserve DMA parameters - LDA $4304 : PHA ; preserve DMA parameters - LDA $4305 : PHA ; preserve DMA parameters - LDA $4306 : PHA ; preserve DMA parameters - ;-------------------------------------------------------------------------------- - LDA #$00 : STA $4300 ; set DMA transfer direction A -> B, bus A auto increment, single-byte mode + PHA + SEP #$30 + LDA.w $4300 : PHA ; preserve DMA parameters + LDA.w $4301 : PHA ; preserve DMA parameters + LDA.w $4302 : PHA ; preserve DMA parameters + LDA.w $4303 : PHA ; preserve DMA parameters + LDA.w $4304 : PHA ; preserve DMA parameters + LDA.w $4305 : PHA ; preserve DMA parameters + LDA.w $4306 : PHA ; preserve DMA parameters + ;-------------------------------------------------------------------------------- + STZ.w $4200 ; Disable NMI, V/H, joypad + STZ.w $420C ; Disable HDMA + LDA.b #$00 : STA.w $4300 ; set DMA transfer direction A -> B, bus A auto increment, single-byte mode - LDA #$80 : STA $4301 ; set bus B source to WRAM register + LDA.b #$80 : STA.w $4301 ; set bus B source to WRAM register - LDA #$00 : STA $2181 ; set WRAM register source address - LDA #$60 : STA $2182 - LDA #$7F : STA $2183 + LDA.b #$00 : STA.w $2181 ; set WRAM register source address + LDA.b #$60 : STA.w $2182 + LDA.b #$7F : STA.w $2183 - STZ $4302 ; set bus A destination address to SRAM - LDA #$05 : STA $4303 - LDA #$70 : STA $4304 + STZ.w $4302 ; set bus A destination address to SRAM + LDA.b #$05 : STA.w $4303 + LDA.b #$70 : STA.w $4304 - LDA #$00 : STA $4305 ; set transfer size to 0x1000 - LDA #$10 : STA $4306 ; STZ $4307 + LDA.b #$00 : STA.w $4305 ; set transfer size to 0x1000 + LDA.b #$10 : STA.w $4306 ; STZ $4307 - LDA #$01 : STA $420B ; begin DMA transfer - ;-------------------------------------------------------------------------------- - PLA : STA $4306 ; restore DMA parameters - PLA : STA $4305 ; restore DMA parameters - PLA : STA $4304 ; restore DMA parameters - PLA : STA $4303 ; restore DMA parameters - PLA : STA $4302 ; restore DMA parameters - PLA : STA $4301 ; restore DMA parameters - PLA : STA $4300 ; restore DMA parameters - REP #$30 - PLA - STA $7EC00D ; what we wrote over + LDA.b #$01 : STA.w $420B ; begin DMA transfer + LDA.b #$81 : STA.w $4200 ; Re-enable NMI and joypad + ;-------------------------------------------------------------------------------- + PLA : STA.w $4306 ; restore DMA parameters + PLA : STA.w $4305 ; restore DMA parameters + PLA : STA.w $4304 ; restore DMA parameters + PLA : STA.w $4303 ; restore DMA parameters + PLA : STA.w $4302 ; restore DMA parameters + PLA : STA.w $4301 ; restore DMA parameters + PLA : STA.w $4300 ; restore DMA parameters + REP #$30 + PLA + STA $7EC00D ; what we wrote over RTL ;-------------------------------------------------------------------------------- CopyExtendedWRAMSaveFileToSRAM: - PHA - PHB - SEP #$30 - LDA #$00 : PHA : PLB - LDA $4300 : PHA ; preserve DMA parameters - LDA $4301 : PHA ; preserve DMA parameters - LDA $4302 : PHA ; preserve DMA parameters - LDA $4303 : PHA ; preserve DMA parameters - LDA $4304 : PHA ; preserve DMA parameters - LDA $4305 : PHA ; preserve DMA parameters - LDA $4306 : PHA ; preserve DMA parameters - ;-------------------------------------------------------------------------------- - LDA #$80 : STA $4300 ; set DMA transfer direction B -> A, bus A auto increment, single-byte mode + PHA + PHB + SEP #$30 + LDA #$00 : PHA : PLB + LDA.w $4300 : PHA ; preserve DMA parameters + LDA.w $4301 : PHA ; preserve DMA parameters + LDA.w $4302 : PHA ; preserve DMA parameters + LDA.w $4303 : PHA ; preserve DMA parameters + LDA.w $4304 : PHA ; preserve DMA parameters + LDA.w $4305 : PHA ; preserve DMA parameters + LDA.w $4306 : PHA ; preserve DMA parameters + ;-------------------------------------------------------------------------------- + STZ.w $4200 ; Disable NMI, V/H, joypad + STZ.w $420C ; Disable HDMA + LDA.b #$80 : STA.w $4300 ; set DMA transfer direction B -> A, bus A auto increment, single-byte mode - STA $4301 ; set bus B source to WRAM register + STA.w $4301 ; set bus B source to WRAM register - LDA #$00 : STA $2181 ; set WRAM register source address - LDA #$60 : STA $2182 - LDA #$7F : STA $2183 + LDA.b #$00 : STA.w $2181 ; set WRAM register source address + LDA.b #$60 : STA.w $2182 + LDA.b #$7F : STA.w $2183 - STZ $4302 ; set bus A destination address to SRAM - LDA #$05 : STA $4303 - LDA #$70 : STA $4304 + STZ.w $4302 ; set bus A destination address to SRAM + LDA.b #$05 : STA.w $4303 + LDA.b #$70 : STA.w $4304 - LDA #$10 : STA $4305 ; set transfer size to 0xB00 - LDA #$0B : STA $4306 ; STZ $4307 + LDA.b #$10 : STA.w $4305 ; set transfer size to 0xB00 + LDA.b #$0B : STA.w $4306 ; STZ $4307 - LDA #$01 : STA $420B ; begin DMA transfer - ;-------------------------------------------------------------------------------- - PLA : STA $4306 ; restore DMA parameters - PLA : STA $4305 ; restore DMA parameters - PLA : STA $4304 ; restore DMA parameters - PLA : STA $4303 ; restore DMA parameters - PLA : STA $4302 ; restore DMA parameters - PLA : STA $4301 ; restore DMA parameters - PLA : STA $4300 ; restore DMA parameters - REP #$30 - PLB - PLA - LDX.w #$0000 : TXA ; what we wrote over + LDA.b #$01 : STA.w $420B ; begin DMA transfer + LDA.b #$81 : STA.w $4200 ; Re-enable NMI and joypad + ;-------------------------------------------------------------------------------- + PLA : STA.w $4306 ; restore DMA parameters + PLA : STA.w $4305 ; restore DMA parameters + PLA : STA.w $4304 ; restore DMA parameters + PLA : STA.w $4303 ; restore DMA parameters + PLA : STA.w $4302 ; restore DMA parameters + PLA : STA.w $4301 ; restore DMA parameters + PLA : STA.w $4300 ; restore DMA parameters + REP #$30 + PLB + PLA RTL diff --git a/sram.asm b/sram.asm index 07a2283..26f2171 100644 --- a/sram.asm +++ b/sram.asm @@ -10,6 +10,7 @@ ;-------------------------------------------------------------------------------- pushpc org 0 ; This module writes no bytes. Asar gives bank cross errors without this. +SaveDataWRAM = $7EF000 ;================================================================================ ; Room Data ($7EF000 - $7EF27F @@ -366,7 +367,7 @@ GTCollectedKeys: skip 1 ; / Ganon's Tower skip 2 ; Reserved for previous table FileMarker: skip 1 ; $FF = Active save file | $00 = Inactive save file skip 13 ; Unused -InverseChecksum: skip 2 ; Vanilla Inverse Checksum. Don't write unless computing checksum. +InverseChecksumWRAM: skip 2 ; Vanilla Inverse Checksum. Don't write unless computing checksum. ;================================================================================ ; Expanded SRAM ($7F6000 - $7F6FFF) @@ -379,8 +380,7 @@ ExtendedFileNameWRAM: skip 24 ; File name, 12 word-length characters. RoomPotData: skip 592 ; Table for expanded pot shuffle. One word per room. SpritePotData: skip 592 ; Table for expanded pot shuffle. One word per room. PurchaseCounts: skip 96 ; Keeps track of shop purchases -PrivateBlock: skip 512 ; Reserved for 3rd party developers -DummyValue: skip 1 ; $01 if you're a real dummy +PrivateBlock: skip 513 ; Reserved for 3rd party developers ;================================================================================ ; Direct SRAM Assignments ($700000 - $7080000) @@ -403,18 +403,29 @@ ProgressIndicatorSRAM: skip 1 ; skip 19 ; FileNameVanillaSRAM: skip 8 ; First four characters of file name FileValiditySRAM: skip 2 ; -skip 285 ; +skip 283 ; +InverseChecksumSRAM: skip 2 ; ExtendedFileNameSRAM: skip 24 ; We read and write the file name directly from and to SRAM (24 bytes) skip $1AE4 ; RomVersionSRAM: skip 4 ; ALTTPR ROM version. Low byte is the version, high byte writes ; $01 for now (32-bits total) RomNameSRAM: skip 21 ; ROM name from $FFC0, burned in during init (21 bytes) ; If value in the ROM doesn't match SRAM, save is cleared. -skip 4075 ; PasswordSRAM: skip 16 ; Password value (16 bytes) - +skip 8155 ; +SaveBackupSRAM: ; Backup copy of save ram. Game will attempt to use this if + ; checksum on file select screen load fails. base off +;================================================================================ +; Bank Definitions +;-------------------------------------------------------------------------------- +; If these move (most likely by placing initsramtable.asm somewhere else) these +; bank definitions need to be changed as well. +;================================================================================ +SRAMBank = $70 +SRAMTableBank = $30|$80 + ;================================================================================ ; Assertions ;================================================================================ @@ -515,7 +526,7 @@ endmacro %assertSRAM(FollowerDropped, $7EF3D3) %assertSRAM(FileNameVanillaWRAM, $7EF3D9) %assertSRAM(FileValidity, $7EF3E1) -%assertSRAM(InverseChecksum, $7EF4FE) +%assertSRAM(InverseChecksumWRAM, $7EF4FE) ;================================================================================ ; Randomizer Assertions @@ -640,7 +651,6 @@ endmacro %assertSRAM(SpritePotData, $7F6268) %assertSRAM(PurchaseCounts, $7F64B8) %assertSRAM(PrivateBlock, $7F6518) -%assertSRAM(DummyValue, $7F6718) ;================================================================================ ; Direct SRAM Assertions @@ -654,9 +664,11 @@ endmacro %assertSRAM(ProgressIndicatorSRAM, $7003C5) %assertSRAM(FileNameVanillaSRAM, $7003D9) %assertSRAM(FileValiditySRAM, $7003E1) +%assertSRAM(InverseChecksumSRAM, $7004FE) %assertSRAM(ExtendedFileNameSRAM, $700500) -%assertSRAM(RomNameSRAM, $702000) %assertSRAM(RomVersionSRAM, $701FFC) -%assertSRAM(PasswordSRAM, $703000) +%assertSRAM(RomNameSRAM, $702000) +%assertSRAM(PasswordSRAM, $702015) +%assertSRAM(SaveBackupSRAM, $704000) pullpc