Initial, partially unsuccessful version
This commit is contained in:
@@ -123,6 +123,8 @@ incsrc compasses.asm
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incsrc doorframefixes.asm
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;incsrc shopkeeper.asm
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incsrc cuccostorm.asm
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incsrc roomloading.asm
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incsrc graphicsoverride.asm
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incsrc hashalphabet.asm ; <- TAKE OUT THE EXTRA ORGS IN HERE - THIS IS WHY WE COULDN'T ADD MORE FILES EARLIER
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warnpc $A18000
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62
graphicsoverride.asm
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62
graphicsoverride.asm
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@@ -0,0 +1,62 @@
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macro OverwriteVramTile(firstTileIndex, count)
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LDA.w #<firstTileIndex>+512*8*8*4/16
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LDX.b #<count>
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JSR UploadTileToVram
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endmacro
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GraphicsOverrideHook:
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JSL .resumeOriginalCode
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LDA $0A ; Floor tileset loaded
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CMP #$0A ; Floor tileset index used by Ice and Mire
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BEQ .loadedIceOrMireFloor
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RTL
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.loadedIceOrMireFloor
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LDA $040C ; Load dungeon number
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CMP #$12 ; Ice Palace
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BEQ .isInIcePalace
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RTL
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.isInIcePalace
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; We've just loading the floor tiles in Ice Palace.
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; Replace the bridge tiles with the bombos medallion
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LDA.b #IcePalaceMedallionGfx>>16
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STA $02
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REP #$20
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LDA.w #IcePalaceMedallionGfx
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STA $00
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%OverwriteVramTile($CA, 2)
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%OverwriteVramTile($DA, 2)
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SEP #$20
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RTL
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.resumeOriginalCode
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; Overwritten instructions:
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PHB
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LDA.b #$00
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PHA
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PLB
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LDA.b #$80
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JML GraphicsOverrideResume
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; A = VRAM word address to upload to (Actual VRAM address / 2)
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; X = Tiles to upload
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; $00-$02 = Pointer to graphics data
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UploadTileToVram:
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; TODO: This should probably be optimized with a DMA
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STA $2116
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TXA : ASL #4 : TAX ; X = Amount of words to upload (Tiles to upload * 16)
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- LDA [$00]
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STA $2118
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INC $00
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INC $00
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DEX
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BNE -
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RTS
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IcePalaceMedallionGfx:
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incbin ice_bombos_floor.bin
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34
hooks.asm
34
hooks.asm
@@ -1925,3 +1925,37 @@ org $0298AD ; <- Bank02.asm:4495 (LDA $010E : CMP.b #$43)
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JSL.l WalkDownIntoTavern
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NOP #1
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;================================================================================
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;================================================================================
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; Hooks for roomloading.asm
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;--------------------------------------------------------------------------------
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org $02895D ; <- Bank02.asm:1812 (JSL Dungeon_LoadRoom)
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JSL LoadRoomHook
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;--------------------------------------------------------------------------------
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org $028BE7 ; <- Bank02.asm:2299 (JSL Dungeon_LoadRoom)
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JSL LoadRoomHook
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;--------------------------------------------------------------------------------
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org $029309 ; <- Bank02.asm:3533 (JSL Dungeon_LoadRoom)
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JSL LoadRoomHook
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;--------------------------------------------------------------------------------
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org $02C2F3 ; <- Bank02.asm:10391 (JSL Dungeon_LoadRoom)
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JSL LoadRoomHook
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;================================================================================
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;================================================================================
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; Hook for graphicsoverride.asm
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;--------------------------------------------------------------------------------
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org $00E1DB ; <- Bank00.asm:4866 (PHB : PHK : PLB : LDA.b #$80)
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JML GraphicsOverrideHook
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NOP
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GraphicsOverrideResume:
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;--------------------------------------------------------------------------------
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org $028BE7 ; <- Bank02.asm:2299 (JSL Dungeon_LoadRoom)
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JSL LoadRoomHook
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;--------------------------------------------------------------------------------
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org $029309 ; <- Bank02.asm:3533 (JSL Dungeon_LoadRoom)
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JSL LoadRoomHook
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;--------------------------------------------------------------------------------
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org $02C2F3 ; <- Bank02.asm:10391 (JSL Dungeon_LoadRoom)
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JSL LoadRoomHook
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;================================================================================
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BIN
ice_bombos_floor.bin
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BIN
ice_bombos_floor.bin
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Binary file not shown.
86
roomloading.asm
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86
roomloading.asm
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@@ -0,0 +1,86 @@
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LoadRoomHook:
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JSL $01873A ; Dungeon_LoadRoom (Bank01.asm:726)
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REP #$10 ; 16 bit XY
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LDX $A0 ; Room ID
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LDA RoomCallbackTable, X
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SEP #$10 ; 8 bit XY
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JSL $00879c ; UseImplicitRegIndexedLocalJumpTable
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; Callback routines:
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dl NoCallback ; 00
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dl IcePalace1 ; 01
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NoCallback:
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RTL
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!RL_TILE = 2
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!RL_LINE = 128
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macro setTilePointer(roomX, roomY, quadX, quadY)
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; Left-to-right math. Should be equivalent to 0x7e2000+(roomX*2)+(roomY*128)+(quadX*64)+(quadY*4096)
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LDX.w #<quadY>*32+<roomY>*2+<quadX>*32+<roomX>*2
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endmacro
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macro writeTile()
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STA.l $7E2000,x
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INX #2
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endmacro
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!IP_BORDER = #$08D0
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!IP_ICON_1 = #$0CCA
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!IP_ICON_2 = #$0CCB
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!IP_ICON_3 = #$0CDA
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!IP_ICON_4 = #$0CDB
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!IP1_X = 14
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!IP1_Y = 18
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IcePalace1:
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REP #$30 ; 16 AXY
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%setTilePointer(!IP1_X, !IP1_Y, 1, 1)
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LDA.w !IP_BORDER
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%writeTile()
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%writeTile()
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%writeTile()
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%writeTile()
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%setTilePointer(!IP1_X, !IP1_Y+1, 1, 1)
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%writeTile()
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LDA.w !IP_ICON_1 : %writeTile()
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LDA.w !IP_ICON_2 : %writeTile()
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LDA.w !IP_BORDER : %writeTile()
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%setTilePointer(!IP1_X, !IP1_Y+2, 1, 1)
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%writeTile()
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LDA.w !IP_ICON_3 : %writeTile()
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LDA.w !IP_ICON_4 : %writeTile()
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LDA.w !IP_BORDER : %writeTile()
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%setTilePointer(!IP1_X, !IP1_Y+3, 1, 1)
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%writeTile()
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%writeTile()
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%writeTile()
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%writeTile()
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SEP #$30 ; 8 AXY
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RTL
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RoomCallbackTable:
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $01, $00 ; 00x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 01x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 02x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 03x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 04x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 05x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 06x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 07x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 08x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 09x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 0Ax
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 0Bx
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 0Cx
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 0Dx
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 0Ex
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 0Fx
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 0Fx
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 10x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 11x
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db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 12x
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