Merge pull request #169 from cassidoxa/validate_sram
Compute checksum for extended SRAM
This commit is contained in:
Lexi Rose
19
events.asm
19
events.asm
@@ -89,16 +89,17 @@ OnAga2Defeated:
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;--------------------------------------------------------------------------------
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OnFileCreation:
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; Copy initial SRAM state from ROM to cart SRAM
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; If the inital SRAM table is move these addresses must be changed
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PHB
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LDA.w #$03D7 ; \
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LDX.w #$B000 ; | Copies from beginning of inital sram table up to file name
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LDY.w #$0000 ; | (exclusively)
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MVN $70, $30 ; /
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; Skip file name and validity value
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LDA.w #$010C ; \
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LDX.w #$B3E3 ; | Rando-Specific Assignments & Game Stats block
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LDY.w #$03E3 ; |
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MVN $70, $30 ; /
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LDA.w #$03D7 ; \
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LDX.w #$B000 ; | Copies from beginning of inital sram table up to file name
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LDY.w #$0000 ; | (exclusively)
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MVN SRAMBank, SRAMTableBank ; /
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; Skip file name and validity value
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LDA.w #$010C ; \
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LDX.w #$B3E3 ; | Rando-Specific Assignments & Game Stats block
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LDY.w #$03E3 ; |
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MVN SRAMBank, SRAMTableBank ; /
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PLB
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; resolve instant post-aga if standard
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11
hooks.asm
11
hooks.asm
@@ -188,7 +188,7 @@ JSL.l AltBufferTable : NOP #8 ; Delete screen
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;--------------------------------------------------------------------------------
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org $0CCCCC ;<- 64CCC - Bank0C.asm : 1628 (JSL Intro_ValidateSram) / Bank02.asm : 75 (REP #$30)
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; Explanation: In JP 1.0 the code for Intro_ValidateSram was inline in Bank 0C
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JML.l Validate_SRAM ;(Return via RTL. Original code JML'd to Intro_LoadSpriteStats which returns with RTL, but we want to skip that)
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JML.l ValidateSRAM ;(Return via RTL. Original code JML'd to Intro_LoadSpriteStats which returns with RTL, but we want to skip that)
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org $0CCD57 ;<- 64D57 - Bank0C.asm :
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RTL ;Just in case anybody ever removes the previous hook
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;--------------------------------------------------------------------------------
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@@ -299,12 +299,17 @@ BRA +
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;================================================================================
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; Extended SRAM Save file
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;--------------------------------------------------------------------------------
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org $0ccf08 ; <- Bank0C.asm : 2036 (LDA.w #$0007 : STA $7EC00D : STA $7EC013)
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org $0CCF08 ; <- Bank0C.asm : 2036 (LDA.w #$0007 : STA $7EC00D : STA $7EC013)
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JSL CopyExtendedSaveFileToWRAM
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;--------------------------------------------------------------------------------
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org $008998 ; <- Bank00.asm : 1296 (LDX.w #$0000)
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JSL CopyExtendedWRAMSaveFileToSRAM
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;--------------------------------------------------------------------------------
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org $00899C ; <- bank_00.asm : #_00899C (CLC)
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JSL WriteSaveChecksumAndBackup
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LDA.w #$01F3 : TCS : SEP #$30 : PLB : RTL ; Get the stack and data bank correct
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padbyte $FF : pad $0089C2 ; Fill adjacent free rom forward. See bank_00.asm: #_0089C2
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;--------------------------------------------------------------------------------
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org $0CD7AB ; <- Bank0C.asm : 3342 (STA $700400, X)
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JSL.l ClearExtendedSaveFile
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;--------------------------------------------------------------------------------
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@@ -2807,4 +2812,4 @@ if !FEATURE_NEW_TEXT
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JSL RenderCharSetColorExtended_init
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org $0EF285
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JSL RenderCharSetColorExtended_close : NOP
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endif
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endif
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@@ -15,6 +15,7 @@ fillword $0000 ; Zero out the table
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fill $500 ;
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org $30B000 ; PC 0x183000
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InitSRAMTable:
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InitRoomDataWRAM:
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org $30B060 ; PC 0x183060
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InitATAltarRoom: dw $0000 ; aga curtains
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297
save.asm
297
save.asm
@@ -1,129 +1,218 @@
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;--------------------------------------------------------------------------------
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Validate_SRAM:
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REP #$30 ; vanilla behavior from $0CCD45, includes prize pack reset after save and quit
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LDX #$00FE : -
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STZ $0D00, X
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STZ $0E00, X
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STZ $0F00, X
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DEX #2
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BPL -
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WriteSaveChecksumAndBackup:
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LDX.w #$0000 : TXA : - ; Checksum first $04FE bytes
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CLC : ADC.l SaveDataWRAM, X
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INX #2
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CPX.w #$04FE : BNE -
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LDX.w #$0000 : - ; Checksum extended save data
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CLC : ADC.l ExtendedFileNameWRAM, X
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INX #2
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CPX.w #$0FFE : BNE -
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STA.b $00
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LDA.w #$5A5A
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SEC : SBC.b $00
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STA.l InverseChecksumSRAM
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PHB
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LDA.w #$14FF ; \
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LDX.w #CartridgeSRAM&$FFFF ; | Copies $1500 bytes from beginning of cart SRAM to
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LDY.w #SaveBackupSRAM&$FFFF ; | $704000
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MVN SRAMBank, SRAMBank ; /
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PLB
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RTL
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;--------------------------------------------------------------------------------
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ValidateSRAM:
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REP #$30
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LDX.w #$0000 : TXA : - ; Checksum first $04FE bytes
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CLC : ADC.l CartridgeSRAM, X
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INX #2
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CPX.w #$04FE : BNE -
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LDX.w #$0000 : - ; Checksum extended save data
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CLC : ADC.l ExtendedFileNameSRAM, X
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INX #2
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CPX.w #$0FFE : BNE -
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STA.b $00
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LDA.w #$5A5A
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SEC : SBC.b $00
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CMP.l InverseChecksumSRAM : BEQ .goodchecksum
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LDX.w #$0000 : TXA : - ; Do the same for the backup save
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CLC : ADC.l SaveBackupSRAM, X
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INX #2
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CPX.w #$04FE : BNE -
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LDX.w #$0000 : -
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CLC : ADC.l SaveBackupSRAM+$500, X
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INX #2
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CPX.w #$0FFE : BNE -
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STA.b $00
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LDA.w #$5A5A
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SEC : SBC.b $00
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CMP.l SaveBackupSRAM+$4FE : BEQ +
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TDC : STA.l FileValiditySRAM ; Delete save by way of zeroing validity marker
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BRA .goodchecksum : +
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PHB
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LDA.w #$14FF ; \
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LDX.w #SaveBackupSRAM&$FFFF ; | Copies $1500 bytes from backup on cart SRAM to
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LDY.w #CartridgeSRAM&$FFFF ; | main save location at $700000
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MVN SRAMBank, SRAMBank ; /
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PLB
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.goodchecksum
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LDX.w #$00FE : - ; includes prize pack reset after save and quit
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STZ.w $0D00, X
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STZ.w $0E00, X
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STZ.w $0F00, X
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DEX #2
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BPL -
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SEP #$30
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RTL
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;--------------------------------------------------------------------------------
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ClearExtendedSaveFile:
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STA $700400, X ; what we wrote over
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STA $700500, X
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STA $700600, X
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STA $700700, X
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STA $700800, X
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STA $700900, X
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STA $700A00, X
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STA $700B00, X
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STA $700C00, X
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STA $700D00, X
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STA $700E00, X
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STA $700F00, X
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STA.l $700400, X ; what we wrote over
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STA.l $700500, X
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STA.l $700600, X
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STA.l $700700, X
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STA.l $700800, X
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STA.l $700900, X
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STA.l $700A00, X
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STA.l $700B00, X
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STA.l $700C00, X
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STA.l $700D00, X
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STA.l $700E00, X
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STA.l $700F00, X
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STA.l $701000, X
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STA.l $701100, X
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STA.l $701200, X
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STA.l $701300, X
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STA.l $701400, X
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; Clear backup save
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STA.l $704000, X
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STA.l $704100, X
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STA.l $704200, X
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STA.l $704300, X
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STA.l $704400, X
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STA.l $704500, X
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STA.l $704600, X
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STA.l $704700, X
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STA.l $704800, X
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STA.l $704900, X
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STA.l $704A00, X
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STA.l $704B00, X
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STA.l $704C00, X
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STA.l $704D00, X
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STA.l $704E00, X
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STA.l $704F00, X
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STA.l $705000, X
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STA.l $705100, X
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STA.l $705200, X
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STA.l $705300, X
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STA.l $705400, X
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RTL
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;--------------------------------------------------------------------------------
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ClearExtendedWRAMSaveFile:
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STA $7EF400, X ; what we wrote over
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STA $7F6000, X
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STA $7F6100, X
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STA $7F6200, X
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STA $7F6300, X
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STA $7F6400, X
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STA $7F6500, X
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STA $7F6600, X
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STA $7F6700, X
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STA $7F6800, X
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STA $7F6900, X
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STA $7F6A00, X
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STA $7F6B00, X
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STA $7F6C00, X
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STA $7F6D00, X
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STA $7F6E00, X
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STA $7F6F00, X
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STA.l $7EF400, X ; what we wrote over
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STA.l $7F6000, X
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STA.l $7F6100, X
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STA.l $7F6200, X
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STA.l $7F6300, X
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STA.l $7F6400, X
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STA.l $7F6500, X
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STA.l $7F6600, X
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STA.l $7F6700, X
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STA.l $7F6800, X
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STA.l $7F6900, X
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STA.l $7F6A00, X
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STA.l $7F6B00, X
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STA.l $7F6C00, X
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STA.l $7F6D00, X
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STA.l $7F6E00, X
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STA.l $7F6F00, X
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RTL
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;--------------------------------------------------------------------------------
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CopyExtendedSaveFileToWRAM:
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PHA
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SEP #$30
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LDA $4300 : PHA ; preserve DMA parameters
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LDA $4301 : PHA ; preserve DMA parameters
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LDA $4302 : PHA ; preserve DMA parameters
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LDA $4303 : PHA ; preserve DMA parameters
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LDA $4304 : PHA ; preserve DMA parameters
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LDA $4305 : PHA ; preserve DMA parameters
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LDA $4306 : PHA ; preserve DMA parameters
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;--------------------------------------------------------------------------------
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LDA #$00 : STA $4300 ; set DMA transfer direction A -> B, bus A auto increment, single-byte mode
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PHA
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SEP #$30
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LDA.w $4300 : PHA ; preserve DMA parameters
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LDA.w $4301 : PHA ; preserve DMA parameters
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LDA.w $4302 : PHA ; preserve DMA parameters
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LDA.w $4303 : PHA ; preserve DMA parameters
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LDA.w $4304 : PHA ; preserve DMA parameters
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LDA.w $4305 : PHA ; preserve DMA parameters
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LDA.w $4306 : PHA ; preserve DMA parameters
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;--------------------------------------------------------------------------------
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STZ.w $4200 ; Disable NMI, V/H, joypad
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STZ.w $420C ; Disable HDMA
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LDA.b #$00 : STA.w $4300 ; set DMA transfer direction A -> B, bus A auto increment, single-byte mode
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LDA #$80 : STA $4301 ; set bus B source to WRAM register
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LDA.b #$80 : STA.w $4301 ; set bus B source to WRAM register
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LDA #$00 : STA $2181 ; set WRAM register source address
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LDA #$60 : STA $2182
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LDA #$7F : STA $2183
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LDA.b #$00 : STA.w $2181 ; set WRAM register source address
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LDA.b #$60 : STA.w $2182
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LDA.b #$7F : STA.w $2183
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STZ $4302 ; set bus A destination address to SRAM
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LDA #$05 : STA $4303
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LDA #$70 : STA $4304
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STZ.w $4302 ; set bus A destination address to SRAM
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LDA.b #$05 : STA.w $4303
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LDA.b #$70 : STA.w $4304
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LDA #$00 : STA $4305 ; set transfer size to 0x1000
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LDA #$10 : STA $4306 ; STZ $4307
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LDA.b #$00 : STA.w $4305 ; set transfer size to 0x1000
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LDA.b #$10 : STA.w $4306 ; STZ $4307
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LDA #$01 : STA $420B ; begin DMA transfer
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;--------------------------------------------------------------------------------
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PLA : STA $4306 ; restore DMA parameters
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PLA : STA $4305 ; restore DMA parameters
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PLA : STA $4304 ; restore DMA parameters
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PLA : STA $4303 ; restore DMA parameters
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PLA : STA $4302 ; restore DMA parameters
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PLA : STA $4301 ; restore DMA parameters
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PLA : STA $4300 ; restore DMA parameters
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REP #$30
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PLA
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STA $7EC00D ; what we wrote over
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LDA.b #$01 : STA.w $420B ; begin DMA transfer
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LDA.b #$81 : STA.w $4200 ; Re-enable NMI and joypad
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;--------------------------------------------------------------------------------
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PLA : STA.w $4306 ; restore DMA parameters
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PLA : STA.w $4305 ; restore DMA parameters
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PLA : STA.w $4304 ; restore DMA parameters
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PLA : STA.w $4303 ; restore DMA parameters
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PLA : STA.w $4302 ; restore DMA parameters
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PLA : STA.w $4301 ; restore DMA parameters
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PLA : STA.w $4300 ; restore DMA parameters
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REP #$30
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PLA
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STA $7EC00D ; what we wrote over
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RTL
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;--------------------------------------------------------------------------------
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CopyExtendedWRAMSaveFileToSRAM:
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PHA
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PHB
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SEP #$30
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LDA #$00 : PHA : PLB
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LDA $4300 : PHA ; preserve DMA parameters
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LDA $4301 : PHA ; preserve DMA parameters
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LDA $4302 : PHA ; preserve DMA parameters
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LDA $4303 : PHA ; preserve DMA parameters
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LDA $4304 : PHA ; preserve DMA parameters
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LDA $4305 : PHA ; preserve DMA parameters
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LDA $4306 : PHA ; preserve DMA parameters
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;--------------------------------------------------------------------------------
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LDA #$80 : STA $4300 ; set DMA transfer direction B -> A, bus A auto increment, single-byte mode
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PHA
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PHB
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SEP #$30
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LDA #$00 : PHA : PLB
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LDA.w $4300 : PHA ; preserve DMA parameters
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LDA.w $4301 : PHA ; preserve DMA parameters
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LDA.w $4302 : PHA ; preserve DMA parameters
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LDA.w $4303 : PHA ; preserve DMA parameters
|
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LDA.w $4304 : PHA ; preserve DMA parameters
|
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LDA.w $4305 : PHA ; preserve DMA parameters
|
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LDA.w $4306 : PHA ; preserve DMA parameters
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;--------------------------------------------------------------------------------
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STZ.w $4200 ; Disable NMI, V/H, joypad
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STZ.w $420C ; Disable HDMA
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LDA.b #$80 : STA.w $4300 ; set DMA transfer direction B -> A, bus A auto increment, single-byte mode
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STA $4301 ; set bus B source to WRAM register
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STA.w $4301 ; set bus B source to WRAM register
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LDA #$00 : STA $2181 ; set WRAM register source address
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LDA #$60 : STA $2182
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LDA #$7F : STA $2183
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LDA.b #$00 : STA.w $2181 ; set WRAM register source address
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LDA.b #$60 : STA.w $2182
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LDA.b #$7F : STA.w $2183
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STZ $4302 ; set bus A destination address to SRAM
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LDA #$05 : STA $4303
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LDA #$70 : STA $4304
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STZ.w $4302 ; set bus A destination address to SRAM
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LDA.b #$05 : STA.w $4303
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LDA.b #$70 : STA.w $4304
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LDA #$10 : STA $4305 ; set transfer size to 0xB00
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LDA #$0B : STA $4306 ; STZ $4307
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LDA.b #$10 : STA.w $4305 ; set transfer size to 0xB00
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LDA.b #$0B : STA.w $4306 ; STZ $4307
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LDA #$01 : STA $420B ; begin DMA transfer
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;--------------------------------------------------------------------------------
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PLA : STA $4306 ; restore DMA parameters
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PLA : STA $4305 ; restore DMA parameters
|
||||
PLA : STA $4304 ; restore DMA parameters
|
||||
PLA : STA $4303 ; restore DMA parameters
|
||||
PLA : STA $4302 ; restore DMA parameters
|
||||
PLA : STA $4301 ; restore DMA parameters
|
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PLA : STA $4300 ; restore DMA parameters
|
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REP #$30
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PLB
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PLA
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LDX.w #$0000 : TXA ; what we wrote over
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LDA.b #$01 : STA.w $420B ; begin DMA transfer
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LDA.b #$81 : STA.w $4200 ; Re-enable NMI and joypad
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||||
;--------------------------------------------------------------------------------
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PLA : STA.w $4306 ; restore DMA parameters
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PLA : STA.w $4305 ; restore DMA parameters
|
||||
PLA : STA.w $4304 ; restore DMA parameters
|
||||
PLA : STA.w $4303 ; restore DMA parameters
|
||||
PLA : STA.w $4302 ; restore DMA parameters
|
||||
PLA : STA.w $4301 ; restore DMA parameters
|
||||
PLA : STA.w $4300 ; restore DMA parameters
|
||||
REP #$30
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PLB
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PLA
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||||
RTL
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32
sram.asm
32
sram.asm
@@ -10,6 +10,7 @@
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;--------------------------------------------------------------------------------
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||||
pushpc
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||||
org 0 ; This module writes no bytes. Asar gives bank cross errors without this.
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SaveDataWRAM = $7EF000
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;================================================================================
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; Room Data ($7EF000 - $7EF27F
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@@ -366,7 +367,7 @@ GTCollectedKeys: skip 1 ; / Ganon's Tower
|
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skip 2 ; Reserved for previous table
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||||
FileMarker: skip 1 ; $FF = Active save file | $00 = Inactive save file
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||||
skip 13 ; Unused
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||||
InverseChecksum: skip 2 ; Vanilla Inverse Checksum. Don't write unless computing checksum.
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InverseChecksumWRAM: skip 2 ; Vanilla Inverse Checksum. Don't write unless computing checksum.
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||||
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||||
;================================================================================
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||||
; Expanded SRAM ($7F6000 - $7F6FFF)
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@@ -379,8 +380,7 @@ ExtendedFileNameWRAM: skip 24 ; File name, 12 word-length characters.
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||||
RoomPotData: skip 592 ; Table for expanded pot shuffle. One word per room.
|
||||
SpritePotData: skip 592 ; Table for expanded pot shuffle. One word per room.
|
||||
PurchaseCounts: skip 96 ; Keeps track of shop purchases
|
||||
PrivateBlock: skip 512 ; Reserved for 3rd party developers
|
||||
DummyValue: skip 1 ; $01 if you're a real dummy
|
||||
PrivateBlock: skip 513 ; Reserved for 3rd party developers
|
||||
|
||||
;================================================================================
|
||||
; Direct SRAM Assignments ($700000 - $7080000)
|
||||
@@ -403,18 +403,29 @@ ProgressIndicatorSRAM: skip 1 ;
|
||||
skip 19 ;
|
||||
FileNameVanillaSRAM: skip 8 ; First four characters of file name
|
||||
FileValiditySRAM: skip 2 ;
|
||||
skip 285 ;
|
||||
skip 283 ;
|
||||
InverseChecksumSRAM: skip 2 ;
|
||||
ExtendedFileNameSRAM: skip 24 ; We read and write the file name directly from and to SRAM (24 bytes)
|
||||
skip $1AE4 ;
|
||||
RomVersionSRAM: skip 4 ; ALTTPR ROM version. Low byte is the version, high byte writes
|
||||
; $01 for now (32-bits total)
|
||||
RomNameSRAM: skip 21 ; ROM name from $FFC0, burned in during init (21 bytes)
|
||||
; If value in the ROM doesn't match SRAM, save is cleared.
|
||||
skip 4075 ;
|
||||
PasswordSRAM: skip 16 ; Password value (16 bytes)
|
||||
|
||||
skip 8155 ;
|
||||
SaveBackupSRAM: ; Backup copy of save ram. Game will attempt to use this if
|
||||
; checksum on file select screen load fails.
|
||||
base off
|
||||
|
||||
;================================================================================
|
||||
; Bank Definitions
|
||||
;--------------------------------------------------------------------------------
|
||||
; If these move (most likely by placing initsramtable.asm somewhere else) these
|
||||
; bank definitions need to be changed as well.
|
||||
;================================================================================
|
||||
SRAMBank = $70
|
||||
SRAMTableBank = $30|$80
|
||||
|
||||
;================================================================================
|
||||
; Assertions
|
||||
;================================================================================
|
||||
@@ -515,7 +526,7 @@ endmacro
|
||||
%assertSRAM(FollowerDropped, $7EF3D3)
|
||||
%assertSRAM(FileNameVanillaWRAM, $7EF3D9)
|
||||
%assertSRAM(FileValidity, $7EF3E1)
|
||||
%assertSRAM(InverseChecksum, $7EF4FE)
|
||||
%assertSRAM(InverseChecksumWRAM, $7EF4FE)
|
||||
|
||||
;================================================================================
|
||||
; Randomizer Assertions
|
||||
@@ -640,7 +651,6 @@ endmacro
|
||||
%assertSRAM(SpritePotData, $7F6268)
|
||||
%assertSRAM(PurchaseCounts, $7F64B8)
|
||||
%assertSRAM(PrivateBlock, $7F6518)
|
||||
%assertSRAM(DummyValue, $7F6718)
|
||||
|
||||
;================================================================================
|
||||
; Direct SRAM Assertions
|
||||
@@ -654,9 +664,11 @@ endmacro
|
||||
%assertSRAM(ProgressIndicatorSRAM, $7003C5)
|
||||
%assertSRAM(FileNameVanillaSRAM, $7003D9)
|
||||
%assertSRAM(FileValiditySRAM, $7003E1)
|
||||
%assertSRAM(InverseChecksumSRAM, $7004FE)
|
||||
%assertSRAM(ExtendedFileNameSRAM, $700500)
|
||||
%assertSRAM(RomNameSRAM, $702000)
|
||||
%assertSRAM(RomVersionSRAM, $701FFC)
|
||||
%assertSRAM(PasswordSRAM, $703000)
|
||||
%assertSRAM(RomNameSRAM, $702000)
|
||||
%assertSRAM(PasswordSRAM, $702015)
|
||||
%assertSRAM(SaveBackupSRAM, $704000)
|
||||
|
||||
pullpc
|
||||
|
||||
Reference in New Issue
Block a user